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ATmega128
Transmission
Modes
Master Transmitter
Mode
The T W I can operate in one of four major modes. These are named Master Transmitter (MT),
Master Receiver (MR), Slave Transmitter (ST) and Slave Receiver (SR). Several of these
modes can be used in the same application. As an example, the T W I can use MT mode to write
data into a T W I EEPROM, MR mode to read the data back from the EEPROM. If other masters
are present in the system, some of these might transmit data to the T W I, and then SR mode
would be used. It is the application software that decides which modes are legal.
The following sections describe each of these modes. Possible status codes are described
along with figures detailing data transmission in each of the modes. These figures contain the
following abbreviations:
S: START condition
Rs: REPEATED START condition
R: Read bit (high level at SDA)
W : W rite bit (low level at SDA)
A: Acknowledge bit (low level at SDA)
A: Not acknowledge bit (high level at SDA)
Data: 8-bit data byte
P: STOP condition
SLA: Slave Address
In Figure 97 to Figure 103 , circles are used to indicate that the T W INT flag is set. The numbers
in the circles show the status code held in T W SR, with the prescaler bits masked to zero. At
these points, actions must be taken by the application to continue or complete the T W I transfer.
The T W I transfer is suspended until the T W INT flag is cleared by software.
W hen the T W INT flag is set, the status code in T W SR is used to determine the appropriate soft-
ware action. For each status code, the required software action and details of the following serial
transfer are given in Table 88 to Table 91 . Note that the prescaler bits are masked to zero in
these tables.
In the Master Transmitter mode, a number of data bytes are transmitted to a slave receiver (see
Figure 96 ). In order to enter a Master mode, a START condition must be transmitted. The format
of the following address packet determines whether Master Transmitter or Master Receiver
mode is to be entered. If SLA+ W is transmitted, MT mode is entered, if SLA+R is transmitted,
MR mode is entered. All the status codes mentioned in this section assume that the prescaler
bits are zero or are masked to zero.
212
2467X–AVR–06/11
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